| 摘要 |
PURPOSE: A nor type semiconductor memory device and a method for reading data therefrom are provided to improve data sensing margin and sensing speed with response to the off-cells. CONSTITUTION: The device includes plurality of memory cell blocks(100), plurality of word lines, plurality of the first bit lines, plurality of the second bit lines, the first bias and ground selector(500), the second bias and ground selector(520), a column decoder, an Y-path gate(300), a sense amplifier(600) and a bias/ground selection control circuit(420). Each memory cell block further includes plurality of memory cells which correspond to the word lines, respectively and are connected in parallel at both sides of the first bit lines. The word lines are allocated in a column direction. The first bit lines are allocated in the row direction. The second bit lines are allocated in row direction. The second bit lines further includes ground lines which are allocated at every odd numbers and main bit lines which are allocated in every even numbers. The first bias and ground selector provides the main bit lines with the bias voltage and the ground voltage selectively. The second bias and ground selector provides the ground lines with the bias voltage and the ground voltage selectively. The column decoder generates select signals for selecting the main bit line. The Y-path gate selects the main bit line with response to the address signal. The sense amplifier detects the voltage levels of the selected main bit lines and the second bit lines corresponding to the selected cell and outputs the data of the selected cell. The bias/ground selection control circuit receives the address signal and generates the select signal for the first and second bias/ground selector.
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