SYSTEM LSI

摘要

PROBLEM TO BE SOLVED: To enable CPU of an MPU to read a program code out of the memory of a control LSI fast by incorporating in the control LSI a code interface circuit which supplies the program code stored in the memory to the CPU. SOLUTION: The CPU 3 of the MPU 1 outputs a branch request signal RCLR and a branch address AD-CPU to both CIU 4 and CIU 21 at a program address branch time. The CIU 4 and CIU 21 once receiving the branch address AD-CPU decode the branch address AD-CPU and decide whether the address is in address ranges assigned to themselves. The CIU 21 outputs the value of the branch address AD-CPU to the address bus of HDC 2 when the value of the branch address AD-CPU is in its address range. The CIU 21 supplies the program code to the CPU 3 independently of 'code prefetching operation'.