发明名称 Variable depth memories for programmable logic devices
摘要 A programmable logic device, which includes a plurality of regions of memory usable by a user of the device, has circuitry for facilitating stringing or chaining together multiple memory regions to produce memory that is deeper than one region.
申请公布号 US6072332(A) 申请公布日期 2000.06.06
申请号 US19980023251 申请日期 1998.02.13
申请人 发明人
分类号 H03K19/177;(IPC1-7):H03K19/177 主分类号 H03K19/177
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