发明名称 MULTIPLEXING/DEMULTIPLEXING SYSTEM
摘要 PROBLEM TO BE SOLVED: To attain multiplexing/demultiplexing conversion with a simple circuit configuration without special sequence control even if a transmission rate of a high transmission rate channel and a low transmission rate channel is an optical value. SOLUTION: The system is provided with a serial/parallel conversion shift register 4 that conducts serial/parallel conversion and with a control shift register 1 controlled to shift contents of the shift register 4 in synchronism with the serial/parallel conversion shift register 4, and the serial/parallel conversion shift register 4 outputs demultiplexed data, based on timing of data outputted from the control shift register 1.
申请公布号 JP2000151532(A) 申请公布日期 2000.05.30
申请号 JP19980319375 申请日期 1998.11.10
申请人 NEC CORP 发明人 IKEDA SHINOBU
分类号 H04J3/00;H04J3/04;(IPC1-7):H04J3/00 主分类号 H04J3/00
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