| 摘要 |
PROBLEM TO BE SOLVED: To provide a compensating capacitor circuit which does not increase integrated chip area. SOLUTION: A mirror compensating amplifier 100 generates an output signal at its amplifier output node by amplifying an input signal applied to its amplifier input cathode. The amplifier has three stages. First amplification stages (24, 26, 54, and 58) have an internal node 102 as an input corresponding thereto and also have a 1st-stage output node 60. Second amplification stages have an amplifier input node as an input corresponding thereto and have a 2nd-stage output node 68. Third amplification stages have a 3rd-stage input node coupled with the 2nd-stage output node and generates an output signal to the amplifier output node 36. A capacitor C2 is coupled between the amplifier output node and internal node and given a voltage mode gain.
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