发明名称 |
NONVOLATILE SEMICONDUCTOR MEMORY AND FABRICATION THEREOF |
摘要 |
PROBLEM TO BE SOLVED: To increase the yield by removing etching residues on the side wall at a step formed by an insulating film abutting on the side wall of a first gate layer and a first gate insulating film through isotropic etching thereby preventing short circuit between gates. SOLUTION: Floating gate layers 4, 9 are etched using a control gate electrode 17 as a mask to form a floating electrode 18. Etching residues of polysilicon are generated along the side wall of an etched central trench part. The etching residues are removed through isotropic etching corresponding to etching of a polisilicon film of 500Åthick using a down flow type etching system. Polysilicon residues are removed from the trench part of an insulation film using a fabrication method where isotropic etching is performed after forming a floating gate electrode and short circuit between gates can be prevented.
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申请公布号 |
JP2000150678(A) |
申请公布日期 |
2000.05.30 |
申请号 |
JP19980319415 |
申请日期 |
1998.11.10 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
KAWAI KENJI;KIMURA HAJIME;OMI KAZUYUKI |
分类号 |
H01L21/28;H01L21/302;H01L21/3065;H01L21/8247;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):H01L21/824;H01L21/306 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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