| 摘要 |
PURPOSE: A clock pulse generator is provided to address the driving circuit of pixelated matrix type needing the supply of a series of well-defined pulse to a circuit sampling high speed image data. CONSTITUTION: A clock signal generator includes a clock input(CK) and n(n is over three) number of stages. Each stage includes transmitting gates(M3,M4) passing the clock pulses from the clock input in response to the control signal of a preceding stage. Control signal generating circuits(M5,M6,M7,M8) provide a control signal(e) to the following stage when the control signal from the preceding stages and the clock pulses from the transmitting gates are completed. Moreover, the control signal generating circuits finish the control signal when the following stage generates a control signal(F).
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