Circuit for producing clock pulses from an inputted base band signal

摘要

In order to reproduce a clock having little jitter in the clock reproduction in data transmission, a reproduced clock is outputted by sampling an inputted base band signal by using sampling pulses by means of a sampler and shaped by means of a flip-flop. Errors of the sampling timing are detected by sampling the base band signal two times with a predetermined interval for each bit and by comparing magnitude of fluctuations of preceding sampled values with magnitude of fluctuations of succeeding sampled values. A clock reproduced circuit acts as a phase synchronizing loop circuit during bit synchronizing signal periods, while during data signal periods errors of the sampling timing are corrected by using an output of the error detection.