发明名称 |
Integrated circuit having buffering circuitry with slew rate control |
摘要 |
Buffering circuitry (10) uses pull-up slew rate control circuitry (12) and pull-down slew rate control circuitry (14) to control the rising and falling slew rates of an output signal (50) provided by buffering circuitry (10). Pull-up slew rate control circuitry (12) and pull-down slew rate control circuitry (14) may be used in an embodiment of buffering circuitry (10) which provides a higher output voltage VHIGH than the standard power voltage VPOWER which is used to power most of the circuitry. Buffering circuitry (10) utilizes distributed resistive elements (89-91) to provide improved electrostatic discharge protection. Buffering circuitry (10) utilizes a low power level shifter (16). Voltage reference generation circuitry (18) may be used to provide a stable low power reference voltage VREF (42).
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申请公布号 |
US6066971(A) |
申请公布日期 |
2000.05.23 |
申请号 |
US19970942740 |
申请日期 |
1997.10.02 |
申请人 |
MOTOROLA, INC. |
发明人 |
PAPPERT, BERNARD J.;WHATLEY, ROGER A. |
分类号 |
G05F3/24;H03K19/003;(IPC1-7):H03K5/12 |
主分类号 |
G05F3/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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