MULTI CHANNEL DIRECT MEMORY ACCESS SYSTEM CAPABLE OF REAL-TIME CONTROL

摘要

PURPOSE: A multi channel direct memory access system capable of real-time control is provided to be operated in a real time by performing a direct memory access using a time slot method. CONSTITUTION: A CPU writes a source address and an object address located in a buffer descriptor 0(BD0) of a RAM(24) to a source address register and an object address register in the case that a DMA module(22) receives a service from a plurality of devices(260-26n). The CPU sets a DMA start bit of a DMA control unit(229). The DMA module(22) accesses a memory while a value of a buffer descriptor change count(BDCC)(227) is 0, or a value of a transmission counter(226) is 0. The DMA module(22) records a transmission count(TCNT) to current transmission count information(40) of a buffer descriptor(BD). The DMA module(22) sets an effective bit of buffer descriptor state information(30) as 1 when the value of the BDCC(227) is 0 and the value of TCNT(229) is not 0.