发明名称 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICES
摘要 PURPOSE: An isolation layer formation method is provided to improve a GOI(gate oxide integrity) and a leakage current by decreasing a degree of slope of moat generated between an active region and a field region. CONSTITUTION: A pad oxide(22) and a nitride layer(23) are deposited on a silicon substrate(21). The silicon substrate(21) in a field region is exposed by etching the nitride layer(23) and the pad oxide(22) using a photoresist pattern(24) as a mask. By anisotropic etching a portion of the exposed silicon substrate(21), an under cut is formed by using mixed gases of HNO3, CH3COOH and HF. Then, a trench(t) is formed by etching the exposed silicon substrate(21), wherein the side walls of the trench(t) has sloped profiles. Preferably, the nitride layer(23) and the pad oxide(22) are further anisotropic etched by using HF, BOF(buffered oxide etchant), so that the aperture of opening is expanded.
申请公布号 KR20000027396(A) 申请公布日期 2000.05.15
申请号 KR19980045312 申请日期 1998.10.28
申请人 HYUNDAI ELECTRONICS IND. CO., LTD. 发明人 YIM, GYU NAM;KANG, TAE JIN
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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