D-FF CIRCUIT HAVING LOW POWER EXHAUSTION

摘要

PURPOSE: A D-flip flop circuit having a low power consumption function is provided to reduce a power consumption by reducing an occupied area. CONSTITUTION: A data input section(21) is controlled according to an external input data and a clock signal and outputs two signals. The data input section(21) includes a PMOS transistor(MP1) for receiving the external input data through a gate thereof, a PMOS transistor(MP2) for receiving the clock signal through a gate thereof, and an NMOS transistor(MN1) for receiving the data through a gate thereof. A driving control signal generator(22) outputs a driving control signal in response to two outputs of the data input section(21) and the clock signal. A driver(23) drives an output data in response to the driving control signal from the driving control signal generator(22). An inverter(24) inverts the output data from the driver(23).