METHOD FRO FORMING SILICIDE LAYER OF SEMICONDUCTOR DEVICES

摘要

PURPOSE: A silicide layer formation method is provided to reduce an aspect ratio of gate electrode and improve a uniformity of silicide layer by selectively etching the gate electrode existed in a peripheral region. CONSTITUTION: On a semiconductor substrate(100) having a cell region and a peripheral region, gate patterns(106) sequentially laminated in a polysilicon layer(102), a tungsten silicide(103), a gate insulator(104) and an HTO(high temperature oxide) layer are formed. A nitride layer(108) having high etching selectivity is formed on the resultant structure, and then an interlayer dielectric(110) is filled into the space region of the gate patterns(106). Then, the nitride layer(108), the HTO layer and a portion of the gate insulator(104) formed in the peripheral region are selectively etched using different etching selectivity. After removing the interlayer dielectric(110), a silicide layer is formed on the exposed semiconductor substrate(100).