| 摘要 |
PROBLEM TO BE SOLVED: To avoid generation of a potential difference between a sample time and a hold time by setting a first control signal-generating means for controlling a transistor at the side of an active load of a differential amplifier means and a second control signal-generating means for controlling a differential amplification current of an input stage of the differential amplifier means, and adjusting a timing of first and second control signals. SOLUTION: When an offset difference is generated in a negative direction, a collector current of a transistor Q2 disappears more quickly than a collector current of a transistor Q4 and a potential at a hold time becomes lower than a potential at a sample time. Therefore, a current value of a current source is adjusted to be larger by combining switches. When the offset difference is generated in a positive direction, the current value of the current source is adjusted to be smaller. The current value of the current source of a switch control circuit 20 is adjusted and collector currents of the transistors Q2 and Q4 are let to disappear simultaneously, thereby making equal potentials of a sample hold circuit 10 at the sample time and hold time.
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