发明名称 INPUT LEVEL CONVERSION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain an input level conversion circuit that can receive a high level high potential input higher than a withstanding voltage of components in the case that a level of an input signal having an amplitude ranging from a low potential level to a high level high potential is converted into a level of a signal having an amplitude ranging from a low level high potential to the low potential level. SOLUTION: The input level conversion circuit has a DC regenerating circuit consisting of a 1st PMOS transistor(TR), a capacitor 11 that is connected between an output terminal of the DC regenerating circuit and a low level power supply terminal, a 1st inverter INV1 whose input terminal connects to an output terminal of the DC regenerating circuit and consisting of a 2nd PMOS TR P2 and a 1st NMOS TR P1, and a 2nd inverter INV2 whose input terminal connects to an output terminal of the 1st inverter INV 1 and consisting of a 3rd PMOS TR P3 and a 2nd NMOS TR N2, and an output terminal of the 2nd inverter INV2 is used for an output terminal of the input level conversion circuit.
申请公布号 JP2000134086(A) 申请公布日期 2000.05.12
申请号 JP19980318363 申请日期 1998.10.21
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 HATANO TAKAHIRO;MATSUTANI YASUYUKI
分类号 H03K19/0185;(IPC1-7):H03K19/018 主分类号 H03K19/0185
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