| 摘要 |
PROBLEM TO BE SOLVED: To obtain a digital signal processor DSP that can process sample data being processing objects for the storage of the sample data corresponding to each signal processing with less hardware quantity even when an input and output mode in a storage means of the sample data differs in respective signal processing stages. SOLUTION: A RAM 4 stores sample data of a plurality of kinds corresponding to signal processing of a plurality of kinds. A counter 6 whose count is updated for each sampling period outputs the count to adders 7, 8 as a base address CNT. An instruction ROM 1 generates a plurality of kinds of offset addresses not duplicated with each other corresponding to signal processing of a plurality of kinds for each sampling period. The adders 7, 8 modify a base address based on the offset addresses to give a write address or a read address of the sample data to the RAM 4.
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