发明名称 Übertragungs- und Empfangsvorrichtung
摘要 The transmitting device latches the time of the absolute clock (IEEE P1394 CTR (cycle time register)) when the V-sync signal of the video signal block is transmitted, adds to the latched time a predetermined delay time equivalent to the sum of the time required for the transmitting device to process the video signal block and the time required for the transmittance; and transmits the resulting sum value together with the video signal block. The receiver extracts the sum value and produces the V-sync signal delayed by said predetermined delay time. <IMAGE>
申请公布号 DE69607495(D1) 申请公布日期 2000.05.11
申请号 DE1996607495 申请日期 1996.01.03
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 KAWAKAMI, YASUNORI;IITSUKA, HIROYUKI;TAKEDA, HIDETOSHI
分类号 G06F13/00;G11B27/032;G11B27/10;H04B1/38;H04L7/00;H04L12/28;H04L12/40;H04L12/56;H04L12/64;H04L12/70;H04N5/04;H04N5/765;H04N7/025;H04N7/03;H04N7/035;H04N7/08;H04N7/081;H04N7/24;H04N7/62 主分类号 G06F13/00
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