Transformation of a first dataword received from a FIFO into an input register and subsequent dataword from the FIFO into a normalized output dataword

摘要

An apparatus for data normalization includes a FIFO buffer for receiving input data words, an input register for receiving a first data word from the FIFO buffer, and a combinatorial circuit for transforming the first data word in the input register and a subsequent data word from the FIFO buffer into a normalized output data word. The apparatus utilizes two or more independent instruction streams to increase the processing speed of the apparatus.