发明名称 Chip Size Semiconductor Package and process for producing it
摘要 A semiconductor device that meets the demand for realizing semiconductor chips in small sizes has connection lands (20) formed on an electrode terminal carrying surface of a semiconductor chip (10) which are electrically connected via a substrate (12) and solder bumps (26) to an external circuit. The connection lands (20) are electrically connected, through connection bumps (14), to connection pads (22) formed on one surface of the interposing substrate (12) of an insulating material so as to face the connection lands (20). Conductor wiring patterns (24) inclusive of the connection pads (22) are formed on one surface of the interposing substrate (12). Conductor wiring patterns (30) inclusive of terminal lands on which the external connection terminals (26) will be mounted, are formed on the other surface of the interposing substrate (12). Conductor wiring patterns (24) formed on the one surface of the interposing substrate (12) are connected to the conductor wiring patterns (30) formed on the other surface of the interposing substrate (12) through solid vias (32) formed by filling recesses with a metal by plating. The recesses are formed to penetrate through the insulating material of the interposing substrate (12) by laser machining and this permits the back surfaces of the conductor wiring patterns (24) on the side of the insulating material to be exposed on their bottom surfaces so that these can be used as electrodes during the metal plating process. <IMAGE>
申请公布号 EP0997942(A2) 申请公布日期 2000.05.03
申请号 EP19990308590 申请日期 1999.10.29
申请人 SHINKO ELECTRIC INDUSTRIES CO. LTD. 发明人 HORIUCHI, MICHIO;IMAI, KAZUNARI
分类号 H01L23/58;H01L21/60;H01L23/12;H01L23/31;H01L23/498;H05K3/34;H05K3/40;H05K3/42 主分类号 H01L23/58
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