发明名称 Gas phase planarization process for semiconductor wafers
摘要 A gas phase planarization process for semiconductor wafers. The present invention comprises a system and method of dry planarization for a semiconductor wafer. For instance, the present invention includes a system adapted to effectively remove all, or a portion of, a layer of dielectric material of a semiconductor wafer through the application of dry abrasion and dry chemistry. As such, a present invention system flattens out height differences of the dielectric material, since high areas of topography are removed faster than low areas. Specifically, one embodiment of the present invention utilizes a dry abrasive polishing pad to abrade the desired surface of the semiconductor wafer within a vacuum planarization chamber. As a result of abrading the surface, the abrasive polishing pad breaks the chemical bonds of a thin layer of the dielectric surface material. Once the chemical bonds are broken, reactive radicals within a plasma gas chemically react with the surface material thereby forming a gaseous species which is highly volatile. In other words, the plasma gas is used to remove previously mechanically polished material from the dielectric layer. Subsequently, the newly formed gaseous species is removed from the vacuum planarization chamber. This process of removing material from the surface of the semiconductor wafer continues until the surface is sufficiently planarized. In this manner, the present invention provides a dry process for planarizing a surface of a semiconductor wafer.
申请公布号 US6057245(A) 申请公布日期 2000.05.02
申请号 US19990233640 申请日期 1999.01.19
申请人 VLSI TECHNOLOGY, INC. 发明人 ANNAPRAGADA, RAO V.;GABRIEL, CALVIN T.;WELING, MILIND G.
分类号 H01L21/3205;B24B7/22;B24D13/14;H01L21/304;H01L21/3105;(IPC1-7):H01L21/302 主分类号 H01L21/3205
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