发明名称 Method for I/O device layout during integrated circuit design
摘要 A method for laying out input/output (I/O) pairs, each including an I/O cell and a pad, on an integrated circuit die. Size information is obtained for each of a first I/O pair and a second I/O pair. A minimum pad spacing criterion is obtained which specifies a minimum distance between the pad in the first I/O pair and an element of the second I/O pair, and the first I/O pair and the second I/O pair are laid out so as to satisfy the minimum pad spacing criterion. Also provided is a method for laying out pads for input/output (I/O) cells on an integrated circuit die in which size information is obtained for each of a first I/O cell pad and a second I/O cell pad. A minimum pad spacing criterion is obtained, and the first I/O cell pad and the second I/O cell pad are laid out so as to satisfy the minimum pad spacing criterion.
申请公布号 US6057169(A) 申请公布日期 2000.05.02
申请号 US19980062254 申请日期 1998.04.17
申请人 LSI LOGIC CORPORATION 发明人 SINGH, VIRINDER;LIANG, MIKE
分类号 G06F17/50;H01L23/50;(IPC1-7):H01L21/66 主分类号 G06F17/50
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