| 摘要 |
PROBLEM TO BE SOLVED: To prevent increase of the passing loss of a variable resistance element due to the parasitic capacitance and also prevent the lowering of variable attenuation to obtain the satisfactory transmission characteristic by connecting together the FET gate terminals of the 1st and 2nd ladder type circuits and using these gate terminals as the control terminals. SOLUTION: The signals inputted through an input terminal 11 pass through a parallel circuit of inductors 51a, 51b, 52a and 52b and FET 30a and 30b from a pass terminal 13 and a coupling terminal 14 via a directional coupler 10, are inputted to a directional coupler 20 via a coupling terminal 24 and a pass terminal 23, synthesized and outputted through an input terminal 21. The FET 30a and 30b vary their resistances against the characteristic impedances of both couplers 10 and 20 by the control voltage supplied to a control terminal 41 and then vary the electric power that is absorbed by the FET 30a and 30b themselves and controls the pass loss to attain a variable attenuation function. The parallel circuit comprises a transmission line of the same characteristic impedance as those of couplers 10 and 20 and a variable resistor and can reduce the impedances of parasitic capacitance of the FET 30a and 30b even in a high frequency area.
|
