| 摘要 |
PROBLEM TO BE SOLVED: To generate a pattern signal at high speed and to easily generate a compression command to store by generating an address of a control command referring to a vector command stored in plural bank memories, using a control pattern in a control memory shown with the address and generating a test pattern. SOLUTION: A pattern generation part 36A generates an address pattern signal 106A, a data pattern signal 108A and an R/W pattern signal 110A based on the control command outputted from a sub-control memory 32A. A pattern generation part 36B generates the address pattern signal 106B, the data pattern signal 108B and the R/W pattern signal 110B based on the control command outputted from the sub-control memory 32B. A high speed conversion part respectively selects and outputs either the address pattern signal 106A or 106B, either the data pattern signal 108A or 108B, either the R/W pattern signal 110A or 110B.
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