发明名称 SUPERCONDUCTIVE LOGIC CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the area and also to shorten the operation time of a superconductive logic circuit by connecting magnetically an input inductor of a magnetic flux quantization parametron gate to an output inductor of the parametron gate of the preceding gate via an insulating layer with no direct connection of them and setting an odd number of >=3 pieces for the output signals of the parametron gate of the preceding gate. SOLUTION: An output inductor 5 of a magnetic flux quantization parametron gate 3 of the preceding gate is magnetically coupled to an input inductor 6 of the gate 3 of the next stage. Then the input signal that is obtained via the magnetic connection of both inductors 5 and 6 is inputted to the gate 3 of the next stage via a Josephson junction 7, a shunt resistance 10 connected in parallel to the junction 7 and an inductor 9 of an input line. The input and output signal lines are set at 20 and 10 picohenries respectively together and the loop inductance of a magnetic flux quantization parametron is set at 3 picohenry.
申请公布号 JP2000124794(A) 申请公布日期 2000.04.28
申请号 JP19980289214 申请日期 1998.10.12
申请人 SCIENCE & TECH AGENCY 发明人 TARUYA YOSHINOBU;HASEGAWA HARUHIRO;TAKAGI KAZUMASA;FUKAZAWA TOKUMI;TSUKAMOTO AKIRA;SAOTOME ETSUHISA
分类号 H03K19/195;H01L39/00;H01L39/22;(IPC1-7):H03K19/195 主分类号 H03K19/195
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