| 摘要 |
PROBLEM TO BE SOLVED: To obtain a semiconductor memory device of layout technique, where a sense amplifier can be made to operate at a high speed reducing an increase in the area of the sense amplifier to an irreducible minimum through a sense amplifier driver dispersed installation method. SOLUTION: A four-bank 256 Mbit DRAM is composed of a four-bank memory cell array region, an array controller region and a Y decoder region corresponding to the memory cell array region, and a common peripheral circuit region. NMOS transistors M3 and M4 in an N channel side sense amplifier circuit 14 and an NMOS transistor M1 in a pull-down side sense amplifier driver circuit 18 are laid out through a manner where the gates G of the NMOS transistors M3 and M4 are formed in the shape of a letter U, the NMOS transistor M1 is arranged between the gates G, furthermore the gate G of the NMOS transistor M1 is divided in two, and a part of a diffusion layer L is removed. A P channel is the same as above. |
