发明名称 |
Method for forming an inlaid via in a semiconductor device |
摘要 |
A inlaid interconnect is formed in a semiconductor device (30). A first interlayer dielectric (ILD) 40 is deposited and etched to form a via opening (44). An etchstop layer (42) is deposited on ILD (40). A second ILD (45) is deposited on etchstop layer (42) in a manner so that a pinch-off region (46) is formed to prevent substantial deposition of the ILD material into via opening (44). While a small deposit (47) of ILD material may form within the via opening, this can be easily removed in a subsequent etch of ILD (45) which forms a trench opening (48) in ILD (45). A metal layer (50) is then deposited and polished to form a metal interconnect having a trench portion (52) and a via portion (54) in device (30). The present invention avoids the need for a substantial over-etch to clear the via, and avoids the need to form a thick resist mask to form the via opening, while maintaining a controlled via diameter.
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申请公布号 |
US6054377(A) |
申请公布日期 |
2000.04.25 |
申请号 |
US19970858109 |
申请日期 |
1997.05.19 |
申请人 |
MOTOROLA, INC. |
发明人 |
FILIPIAK, STANLEY M.;ARNOLD, JOHN C.;CRABTREE, PHILLIP |
分类号 |
H01L21/316;H01L21/768;(IPC1-7):H01L21/441 |
主分类号 |
H01L21/316 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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