| 摘要 |
PURPOSE: A digital signal processor is provided to reduce time required for rounding-processing data by performing data rounding simultaneously with processing data saturation, thereby processing signals at high speed, and to promptly perform fixed-point and integer operations by arranging bit aligners in front and rear ends of an accumulator with simplifying the construction of a circuit. CONSTITUTION: Input elements(30,40,44,48,64,66,76,78) input N bit data. Operation elements(58,72) operate data from the input element and data from a return loop. A memory(30,40) stores data from the operation elements(58,72) temporarily and is connected with the return loop. A scaling element scales data from the input element (30,40,44,48,64,66,76,78). A selecting element selectively transmits data from the scaling element and data from the operation elements(58,72) to the memory.
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