发明名称 METHOD FOR FORMING MULTI-LAYERED LINE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming multi-layered line of a semiconductor device is provided to prevent the burying phenomenon due to the over polishing through a simple process. CONSTITUTION: A CMP(Chemical Mechanical Polishing) is performed after forming an insulation layer having a higher polishing ratio than an interlayer insulation film between the interlayer insulation film and a Ti/TiN film. The method comprises the process of stacking a first insulation film(120) and a second insulation film(130) having a different etching selectivity each other on a semiconductor substrate(110) in sequence where an integrated circuit is formed, and forming a pattern on an insulation film on a fixed area where a metallic line is to be buried. After forming a pattern on the second insulation film, a metal is stacked on the front of the metallic line pattern. A number of metal layers separated electrically by the first insulation film each other are formed by removing a part of the metal and the second insulation film with CMP. Then, a number of top electrodes connected electrically are formed so as to correspond to each of the metal layers.
申请公布号 KR20000019905(A) 申请公布日期 2000.04.15
申请号 KR19980038251 申请日期 1998.09.16
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 SEO, DAE KYU;KIM, CHANG KYU
分类号 H01L21/768;(IPC1-7):H01L21/768 主分类号 H01L21/768
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