发明名称 IC interconnect formation with chemical-mechanical polishing and silica etching with solution of nitric and hydrofluoric acids
摘要 An integrated circuit manufacturing method uses chemical-mechanical polishing (CMP) to planarize a nonplanar submetal (or intermetal) silica dielectric layer. The planarized device is cleaned with an aqueous solution of ammonium hydroxide and citric acid. Exposed hydrated silica is etched using mixture of nitric and hydrofluoric acids, freeing embedded contaminants from the CMP slurry. The hydrofluroic acid is the etching agent, while the nitric acid combines with the freed contaminants to render water soluble products. They are thus carried away in an aqueous rinse, whereas otherwise they might recontaminate the device. A metal interconnect structure is formed on the etched oxide by forming contact apertures, depositing metal, and patterning the metal. The method can be applied also to nonplanar intermetal dielectrics and subsequent metal interconnect layers. The result is an integrated manufacturing method with higher yields and a more reliable manufactured integrated circuit.
申请公布号 US6048789(A) 申请公布日期 2000.04.11
申请号 US19970807069 申请日期 1997.02.27
申请人 VLSI TECHNOLOGY, INC. 发明人 VINES, LANDON B.;BELLOWS, CRAIG A.;PARMANTIE, WALTER D.
分类号 H01L21/306;H01L21/3105;H01L21/311;H01L21/768;(IPC1-7):H01L21/461 主分类号 H01L21/306
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