| 摘要 |
PROBLEM TO BE SOLVED: To provide a latch signal generating circuit for latching a readout data and outputting that data even at both Read timings of tCAS:minimum and tCP:minimum in both a low potential condition (a period of tCAS) and a high potential condition (a precharge period, tCP) of a CASB of a semiconductor storage device. SOLUTION: A semiconductor storage device is composed of a decoder 100 for inputting an internal generation address Ai, a memory cell array 101 in a matrix composed of memory cells, a D-latch circuit 102 for latching data R that is to be output from a cell selected by the decoder 100, an output buffer 104 for outputting data, and a latch signal generating circuit 1 for generating a clock signal of the D-latch circuit 102. The latch signal generating circuit 1 can generate such a data latch signal that corresponds to each readout operation mode.
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