| 摘要 |
PROBLEM TO BE SOLVED: To provide a wait control device/method which can produce a wait signal that ensures a stable operation in an optimum cycle and also can easily control the wait signal phase of a CPU. SOLUTION: In a setup adjustment mode of a wait signal, a wait control block 13 reads the deciding data out of a register 21 and stores them in a general-purpose register of a CPU, reads the deciding data out of the register of the CPU and stores them in a register 22 and then decides whether or not these held data are matched via a compactor 23 to update a register 25 when mismatch of data is decided. The same operation is carried out also in a wait signal hold adjustment mode and a register 26 is updated when the mismatch of data is decided. In accordance with time corresponding to the value of the register 25 that is set when the data is matched, the time position of a leading edge is controlled. Meanwhile a wait signal where in accordance with the time corresponding to the value or the register 26 set when the data is matched, the time position of a trailing edge are controlled is produced and outputted.
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