| 摘要 |
PROBLEM TO BE SOLVED: To provide an SRAM-type semiconductor storage that can prevent erroneous write to a non-selected column cell due to load capacity, has improved retention characteristics, and achieves speedy write to a memory cell. SOLUTION: In an SRAM-type semiconductor storage, a specific memory cell is selected from a plurality of memories C11-Cmn by word lines WA1-Wam and column selection signals COLA0 and COLA1, one-bit data is stored in a first node N1 of the memory cell, and at the same time inverted data is stored at a second node N2 of the memory cell. In the semiconductor storage, a pair of transistors Q7 and Q8 for connecting the first node N1 and the second node N2 is provided, one transistor Q7 is controlled by the word line WA1, and the other transistor Q8 is controlled by the column selection signal COLA0 and an equalization control signal S0.
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