发明名称 CIRCUIT FOR IMPROVING DATA READ SPEED IN FLASH MEMORY
摘要 PURPOSE: A circuit is provided to write data stably by enabling a counter in a synchronization to normal clocks or converted clocks according to a write mode or a read mode. CONSTITUTION: A circuit comprises: an inverter(100) for inputting a read control signal (READ CON) to a counter control part(31), controlling a first and second counter(32, 33), and outputting an external clock(CLK) inversely; a multiplexer(200) for selectively outputting the external clock(CLK) and the inverted clock from the inverter(100) by the read control signal(READ CON); and a latch part(300) for latching data of an input/output buffer(2) at the time of outputting data by an application of the external clock(CLK).
申请公布号 KR20000019161(A) 申请公布日期 2000.04.06
申请号 KR19980037135 申请日期 1998.09.09
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 SHIN, TAE SEUNG
分类号 G11C16/06;G11C7/00;G11C16/26;(IPC1-7):G11C16/06 主分类号 G11C16/06
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