| 摘要 |
PROBLEM TO BE SOLVED: To reduce a circuit scale even if an image data size is large by weighting and synthesizing image data outputted by each buffer memory of a delaying means and performing horizontal or vertical image data signal processing. SOLUTION: Because horizontal conversion processing 73 performs prescribed weighting of image data delayed by one pixel and synthesizes them, compensating or thinning processing is performed between horizontal pixels to convert horizontal resolution. Also, a vertical buffer 74 consists of 1st to 3rd buffer memories 91 to 93 and outputs image data delayed by one to three lines respectively. A vertical conversion processing circuit 75 performs prescribed weighting of data delayed by one line and synthesizes them and performs compensating or thinning processing between vertical pixels to convert vertical resolution. Thus, even if a buffer memory capacity necessary to vertical resolution conversion does not meet one line, a memory controller reads in accordance with the buffer memory capacity to enable the vertical resolution conversion of a resolution conversion circuit 28.
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