发明名称 BANK SELECTOR CIRCUIT FOR A SIMULTANEOUS OPERATION FLASH MEMORY DEVICE WITH A FLEXIBLE BANK PARTITION ARCHITECTURE
摘要 <p>A bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture comprises a memory boundary option (18), a bank selector encoder (2) connected to receive a memory partition indicator signal from the memory boundary option (18), and a bank selector decoder (3) connected to receive a bank selector code from the bank selector encoder (2). The decoder (3), upon receiving a memory address, outputs a bank selector output signal to point the memory address to either a lower memory bank or an upper memory bank in the simultaneous operation flash memory device, in dependence upon the selected memory partition boundary.</p>
申请公布号 WO2000017886(A1) 申请公布日期 2000.03.30
申请号 US1999018762 申请日期 1999.08.16
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