| 摘要 |
<p>Low current techniques for distributing a clock signal from a clock generator to a load avoid power losses through stray (parasitic) capacitances. A current clock signal having a periodic current waveform is generated and distributed to the load. A low impedance at the load input causes negligible voltage fluctuation, which is the cause of current loss through stray capacitances when conventional clock distribution techniques are used. The low impedance at the load input may be effected in the form of a current mirror. For typical loads, which require that the clock signal be in the form of a periodic voltage rather than current signal, the current clock signal present at an oupput of the low impedance input (e.g., an output of a current mirror) is converted to a corresponding voltage clock signal having a periodic voltage waveform. The corresponding voltage clock signal is then supplied to the load. The current clock signal having the periodic current waveform may be generated by first generating a voltage clock signal having a voltage waveform (e.g., at the output of a crystal oscillator), and converting the voltage clock signal into the current clock signal having the periodic current waveform.</p> |
