发明名称 Wide exclusive or and wide-input and for PLDS
摘要 A programmable logic device (10) has a number of programmable logic elements (LES) (12) which are grouped together in a plurality of logic array blocks (LABs) (14). An LAB incorporates one or more wide-input AND gates (74) for selectively combining the outputs of any number of LEs and producing a signal that is a logical combination of any number of its LEs. In variations of the invention, input signals may be selectively coupled to an AND gate by means of an OR gate (78) and may be selectively inverted by means of an XOR gate (76). A digital information processing system (500) incorporating the invention is disclosed. Various circuit techniques are provided for efficient implementation of a fast and wide exclusive OR or exclusive NOR function. A logic array block is equipped with a dedicated exclusive OR circuit with programmable inputs connected to selected terms from various logic cells, or outputs of the various logic cells. Another embodiment allows creating an embedded chain of exclusive OR gates to implement a wide exclusive OR gate by cascading a smaller exclusive OR gate within several logic cells.
申请公布号 US6043676(A) 申请公布日期 2000.03.28
申请号 US19970825821 申请日期 1997.03.28
申请人 ALTERA CORPORATION 发明人 MENDEL, DAVID W.;FAIRBANKS, BRENT A.;PEDERSEN, BRUCE B.
分类号 H03K19/177;(IPC1-7):H03K19/177 主分类号 H03K19/177
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