| 摘要 |
PURPOSE: A method is provided to fabricate a vertical transistor more effectively and easily. CONSTITUTION: The method for fabricating a vertical transistor comprises the steps of: forming a first device region selected from a group of a source region and a drain region of a semiconductor device; forming first, second and third material layers (110, 115, 120) on the first device region, wherein the second material layer is inserted between the first material layer and the third material layer; forming a window in the three material layers, wherein the window ends at the first device region; forming a plug (131) in the three material layers by filling the window with a semiconductor material, wherein the plug has a first end and a second end; making one of the first and second device regions become a source region and the other thereof become a drain region; removing a part of the third material layer so as to be exposed the second material layer under the third removed material layer; removing the second material layer so as to be exposed a part of the semiconductor plug; forming a dielectric material layer on the exposed portion of the plug; and forming a gate connected with the dielectric material layer.
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