EOS/ESD protection for high density integrated circuits

摘要

A method for achieving improving ESD protection in integrated circuits. Capacitance associated with a power supply plays an important role in ESD protection and increasing Vcc-c capacitance by integrating distributed capacitors as junction capacitors, or MOS capacitors along Vcc and grounded n+ diffusion parallel runs improves protection against ESD and EOS. Additionally, at least a pair of antiparallel diodes interposed between the periphery voltage source and internal core circuitry voltage provides an added noise margin.