发明名称 Circuit and method for controlling memory depth
摘要 A memory array having a physical depth of 2N-bits (N being an integer) includes control and data bus logic configured to control read and/or write operation in the memory array and to select the depth of the memory array. The control logic may include upper and lower byte control circuitry and the depth of the array may be selected from a group consisting of xN-bits and 2xN-bits, x being an integer. The control and data bus logic may be implemented as metal options within the device to be selected during fabrication to achieve a desired array depth.
申请公布号 US6041388(A) 申请公布日期 2000.03.21
申请号 US19970804025 申请日期 1997.02.19
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 ANUMULA, SUDHAKER REDDY;WU, PING
分类号 G11C7/10;(IPC1-7):G06F13/00 主分类号 G11C7/10
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