| 摘要 |
PROBLEM TO BE SOLVED: To provide a data processor which enables fast access to data by transferring data stored in a slow-access memory to a fast-access memory more efficiently. SOLUTION: The processor has adders 704 and 705 which add an address signal and address conversion data set by a central processor and obtain a converted address signal corresponding to the address signal and a selector 713 which selects the converted address signal obtained by the adders 704 and 709 or the address signal according to detection signals outputted from coincidence detecting circuits 708 and 709 deciding whether or not the address signal matches the ROM address of the conversion source and the processes of the adders 704 and 705 and coincidence detecting circuits 708 and 709 are performed in parallel.
|
