发明名称 Semiconductor memory device that can have power consumption reduced during self refresh mode
摘要 In a self refresh mode, a precharge potential generation circuit provides a potential of a level that is lower than +E,fra 1/2+EE the internal power supply potential level. An internal drive circuit provides the level of the internal power supply potential in a self refresh mode as the level of the signal to specify selective coupling between a sense amplifier and a bit line pair that takes a shared sense amplifier structure. The self refresh cycle time can be increased to lower the charging current of the bit line.
申请公布号 US6038186(A) 申请公布日期 2000.03.14
申请号 US19980064834 申请日期 1998.04.23
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 TANIZAKI, TETSUSHI
分类号 G11C11/406;G11C11/4074;(IPC1-7):G11C7/00 主分类号 G11C11/406
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