发明名称 |
METHOD FOR MANUFACTURING A CHIP SCALE PACKAGE IN A WAFER STATE |
摘要 |
<p>PURPOSE: A method for manufacturing a chip scale package in a wafer state is provided, which forms a metal wire and an insulating layer on a semiconductor wafer to manufacture a chip scale package. CONSTITUTION: The method for manufacturing a chip scale package in a wafer state comprises the steps of: providing a semiconductor wafer (10) having a chip cutting region between integrated circuit chips; forming a metal wire layer (66) to be electrically connected to chip pads (12); covering an insulating layer (68) having a certain thickness on an inactive layer (14) and the metal wire layer (66) and removing a part of the insulating layer (68) to form a ball pad (70); forming a solder ball (74) to the ball pad (70); and cutting the semiconductor wafer (10) to divide each integrated circuit for obtaining a chip scale package. Thereby, it is possible to decrease the manufacturing cost.</p> |
申请公布号 |
KR20000015326(A) |
申请公布日期 |
2000.03.15 |
申请号 |
KR19980035175 |
申请日期 |
1998.08.28 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHANG, DONG-HYUN;KIM, NAM-SEOK;KANG, SA-YUN;KWON, HEUNG-GYU |
分类号 |
H01L23/12;H01L21/3205;H01L21/60;H01L23/00;H01L23/31;H01L23/485;H01L29/06;(IPC1-7):H01L21/28 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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