发明名称 Mixed IC tester used in testing mixed IC comprising of logic portion and memory portion
摘要 The mixed IC tester has a switching circuit (21) connected between several IC sockets (SK1-SK8) and a tested IC. The switching circuit selectively supplies a driving signal to the IC sockets for testing the memory portion and the logic portion of the IC. The IC comprises of predetermined driving channels. The required number of driving channels and pins for testing the memory portion of the IC is determined with the equivalent number of the IC sockets. The switching circuit changes its condition for testing the logic portion of the IC. An Independent claim is also included for the control procedure of the IC tester.
申请公布号 DE19937820(A1) 申请公布日期 2000.03.09
申请号 DE19991037820 申请日期 1999.08.11
申请人 ADVANTEST CORP. 发明人 KOBAYASHI, SATOSHI
分类号 G01R31/26;G01R31/28;G01R31/317;G01R31/319;G11C29/02;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 主分类号 G01R31/26
代理机构 代理人
主权项
地址