发明名称 |
Semiconductor memory device for a rapid random access |
摘要 |
A random access memory device includes a plurality of memory blocks, a memory block selecting circuit and a column decoder. Each memory block comprise a memory cell array including a plurality of word lines, a plurality of bit line pairs and a plurality of memory cells, and a peripheral circuit including sense amplifiers which amplify data read out onto bit line pairs when a memory block select signal for a particular memory block is active to connect all memory cells contained in one row with associated bit line pairs. An access control circuit changes a block address and a column address while maintaining a row address unchanged, thus performing a rapid random access of memory cells contained in a common row over the memory blocks.
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申请公布号 |
US6034911(A) |
申请公布日期 |
2000.03.07 |
申请号 |
US19960729422 |
申请日期 |
1996.10.11 |
申请人 |
NEC CORPORATION |
发明人 |
AIMOTO, YOSHIHARU;KIMURA, TOHRU;YABE, YOSHIKAZU |
分类号 |
G11C11/401;G11C7/00;G11C8/12;G11C11/407;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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