发明名称 |
PHASE COMPARATOR OF DELAY LOCKED LOOP AND DELAY SYNCHRONIZATION method THEREOF |
摘要 |
<p>PURPOSE: A phase comparator of delay locked loop and a delay synchronization method thereof is provided to perform a phase comparison by comparing a delay clock signal due to delay of the K-th pulse of a reference clock signal to the next pulse to the K-th pulse. CONSTITUTION: The phase comparator of delay locked loop and a delay synchronization method thereof comprises: a delaying divide(11) for receiving a reference clock signal and generating a delay clock signal by delaying as much as a delay time, which is determined by a voltage level of a predetermined control signal; a phase comparing device(13) for a delay increasing signal when inputting the K-th pulse and a delay decreasing signal when inputting the L-th pulse by comparing a delay clock signal of the K-th pulse of a reference clock signal to a delay clock signal of the L(L=K+1)-th pulse of the reference clock signal; and a charge pump(15) for supplying the control signal to change a voltage level according to a duty rate of the delay increasing signal and the delay decreasing signal.</p> |
申请公布号 |
KR20000013436(A) |
申请公布日期 |
2000.03.06 |
申请号 |
KR19980032293 |
申请日期 |
1998.08.08 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JU, YOUNG GYU;LEE, JAE GYUNG |
分类号 |
H03L7/00;G11C11/407;G11C11/4076;H03K5/00;H03K5/13;H03K5/26;H03L7/081;H03L7/089;(IPC1-7):H03K5/26 |
主分类号 |
H03L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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