| 摘要 |
PROBLEM TO BE SOLVED: To improve the realiability by making a clearance near the central line of an IC chip to be asymmetrical to the virtual central line of the IC chip so as not to include a void, in the mounting structure where the IC chip is mounted in a flip-chip state and a packaging resin is injected between the IC chip and a circuit board. SOLUTION: A circuit pattern 5 is formed on a circuit board 4 apart slightly from the central part of an IC chip, and a clearance between the IC chip 1 and the circuit board 5 forms a narrow constricting part and becomes asymmetrical to the virtual central line passing through the center of the IC chip. Therefore, when a packaging resin 7 is injected into the clearance, a void 6 is not formed in the central part of the IC chip but apart therefrom. The void 6 formed at the asymmetrical position to the IC chip can be removed easily in the following evacuating and deaerating steps, so that the reduction of moisture resistance due to void and of realiability due to stress can be prevented.
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