| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage device, together with its manufacturing method, which employs 3-transistor cell with reduced power consumption, while the area is reduced. SOLUTION: With a plate line PL which allows independent voltage application to be prepared, the source of a transistor S-MOS where information is stored is connected to the plate line PL. At high-level writing, the plate line PL and a bit-line PL are set equipotential. A charge storage gate electrode SG for forming a gate of the transistor S-MOS where information is stored, and an impurity diffusion layer of a writing transistor W-MOS are connected electrically at the lower part of the bit line BL. |
