| 摘要 |
PROBLEM TO BE SOLVED: To prevent a loss in a speed due to a heavy load of an isolation control line to assure a high speed operation by controlling a first discharging circuit with an inverted isolation control signal transferred through a complementary line of the isolation control line. SOLUTION: When a memory cell array connected to the first bit line pair BLi, /BLi is activated to operate, the first isolation control signal transferred through the first isolation control line ISi becomes the boosted voltage VPP level and the second isolation control signal transferred through the second isolation control line Isj is discharged to the ground voltage VSS level. Even when a load of the second isolation control line ISj is high while the second isolation control signal is discharged to the ground voltage VSS level, the discharge circuit NB to which the inverted signal of the second isolation control signal is applied is turned over and the second isolation control signal is quickly discharged to the ground voltage VSS level. |
