| 摘要 |
An encryption code decoding prevention circuit for a semiconductor memory device, such as an EPROM, includes a plurality of encryption code cells, an encryption word line operator, a word line operator, a plurality of read data encrypting processors for encrypting data output from memory cells, and an output data detector for enabling an output detecting signal when all bit lines are judged not to have data thereon, by checking an n-bit output applied from the read data encrypting processors to an output buffer. The output buffer amplifies the n-bit data output from the read data encrypting processors and outputs an output data of "1" each time a carry value is applied thereto from the encryption word line operator. The circuit prevents encrypted data from being exposed by making it appear as if unused memory cells are in use by simulating data values of "1" for each of the unused cells.
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